Technical Skills

• Relevant industry experience in the field of Physical Design Implementation.
• Design experience in all aspects of physical design.
• Relevant industry experience in the field of Analog mixed signal verification.
• Strong understanding of analog circuit concepts.
• Experience in developing HDL test bench using Verilog / System Verilog / VHDL /UVM
• Hands on experience working on Co-Simulation using NCSIM and SPICE , SPECTRE or similar tools.
• Expertise in scripting languages such as UNIX/LINUX Shell, Perl/Python.
• Understanding of analog and digital signals and Debug.
• Should be Familiar with debug in Schematic and RTL.
• Experience in Behavioral modeling or Wreal modeling using System Verilog. SVRM, Verilog AMS is an added advantage.
• Experience working on simulation tools such as Questa. AMS designer or similar mixed signal simulators is an added advantage.
• Should be Familiar using Cadence Virtuoso Schematic editor, ADE.

Additional Skills:

• It is essential that the individual has good written and oral communication skills.